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NCP1927
http://onsemi.com
20
Figure 25. OVP Timing Diagram
PDRV
V
out
V
out(nom)
OVP
time
time
time
Figure 26. POVUV Pin Block
POVUV
R
POVUV1
R
POVUV2
OVP
UVP
V
out
The NCP1927 detects a UVP fault when the output
voltage falls below the UVP limit. During a UVP fault, the
drive output and error amplifier (EA) are disabled, and
C
PControl
 is discharged. It is important to note that the PFC
stage does not start if V
POVUV
 is lower than V
UVP
. This
protects the application when there is a problem with the
power path to the bulk capacitor (i.e. the capacitor is unable
to charge up) or if the controller is unable to sense the output
voltage (i.e. the POVUV Pin is floating). The output voltage
that causes a UVP fault is calculated using Equation 14.
V
out(UVP)
+ V
UVP
@
R
POVUV1
) R
POVUV2
R
POVUV2
) I
UVP
@ R
POVUV1
(eq. 14)
Overcurrent Protection (OCP)
The NCP1927 contains an OCP circuit to protect the PFC
stage by limiting the coil current. A current sense resistor
(R
sense
) is inserted in the return path to generate a negative
voltage proportional to the coil current (V
Rsense
) as
portrayed by Figure 27. The circuit uses V
Rsense
 to detect
when the coil current exceeds its maximum permissible
level. To do so, the circuit incorporates an operational
amplifier that sources the current necessary to maintain the
PCS pin at zero volts. A resistor (R
PCS
) inserted between the
PCS pin and R
sense
 allows the current sourced by the PCS
pin (I
PCS
) to be adjusted via Equation 15.

R
sense
@ I
L
)
R
PCS
@ I
PCS
+ 0
(eq. 15)
where I
L
 is the current flowing through the boost inductor.
Rearranging Equation 15 allows I
PCS
 to be calculated
using Equation 16.
I
PCS
+
R
sense
R
PCS
@ I
L
(eq. 16)
If I
PCS
  exceeds I
OCP
  (typically 250 mA), an OCP
condition is detected and the driver is turned off. The driver
remains off until I
PCS
 falls below I
OCP
, and the next ZCD
transition occurs or the watchdog timer expires. The
maximum coil current (I
L(MAX)
) is calculated with
Equation 17.
I
L(MAX)
+
R
PCS
R
sense
@ I
OCP
(eq. 17)
where I
OCP
 is the OCP threshold current.
Figure 27. Current Sense Block

+
To PDRV disable
PCS
I
PCS
 > I
OCP
V
DD
R
PCS
I
PCS
R
sense
I
PCS
I
L
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